The present invention relates generally to a method of assembling a semiconductor chip package and specifically relates to a method of encapsulating a semiconductor chip package or an array of such semiconductor chip packages.
A semiconductor chip is generally connected to an external circuit element through contacts on the front face of the chip. The contacts may be disposed in an area array, which substantially covers the entire front face of the chip, or in elongated rows extending parallel to and adjacent each edge of the chip. In certain embodiments, the contacts are connected to the external circuit element using flexible leads or wires. For example, in the tape automated bonding process (hereinafter referred to as the xe2x80x9cTABxe2x80x9d process), a dielectric sheet, such as a thin foil of polyimide, is provided with one or more bonding windows and an array of metallic leads is provided on one surface of the dielectric sheet. Each lead extends outwardly from a central portion of the dielectric sheet towards one of the bond windows and has an outermost end projecting beyond the edge of the bond window. The dielectric sheet is juxtaposed with the chip so that the bond windows are aligned with the chip and so that the outermost ends of the leads will extend over the front, contact bearing face of the chip. The outermost ends of the leads are then bonded to the contacts of the chip, as by ultrasonic or thermocompression bonding. The inner ends of the leads are connected to external circuit elements, such as a printed circuit board, via conductive terminals.
Certain designs have reduced the stress on such electrical connections by redistributing the thermal cycling stress into a portion of the semiconductor chip package itself. An example of such a design is shown in commonly assigned U.S. Pat. Nos. 5,148,265 and 5,148,266, both disclosures of which are incorporated herein by reference. One disclosed embodiment of these patents shows the use of a chip carrier in combination with a resilient element to minimize problems associated with thermal cycling. Typically, the resilient element includes an elastomeric layer which, in the finished package, is disposed between the chip carrier and the contact bearing surface of the semiconductor chip. The resilient element provides resiliency to individual terminals on the chip carrier, allowing each terminal to move in relation to its electrically connected chip contact to accommodate for thermal cycling differences as necessary during testing, final assembly and operation of the device.
It has been determined that the use of an encapsulating material around the resilient element further reduces the stress on the electrical connections between the semiconductor chip and a chip carrier during operation of the chip and seals the elements of the chip package against corrosion. For example, copending, commonly assigned U.S. Pat. No. 5,659,952, the disclosure of which is incorporated herein by reference, discloses a method of fabricating a compliant interface for a semiconductor chip typically comprised of a compliant encapsulation layer having a controlled thickness. In certain preferred embodiments of the ""952 Patent, a first support structure, such as a flexible, substantially inextensible dielectric film, is provided. A resilient element, such as a plurality of compliant pads defining channels therebetween, is attached to a first surface of the first support structure. The compliant pad/support structure subassembly is then assembled with a second microelectronic element such as a semiconductor chip having a front face including a plurality of contacts. During assembly, the front face of the semiconductor chip is abutted against the compliant pads and the contacts are electrically connected to corresponding terminals on a second side of the dielectric film. An encapsulant material, such as a curable liquid elastomer, is then disposed between the semiconductor chip and the dielectric film and around the compliant pads while the chip and the dielectric film are held in place.
Other methods of encapsulating a microelectronic package are disclosed in commonly assigned U.S. patent application Ser. No. 08/726,697 filed Oct. 7, 1996, the disclosure of which is incorporated by reference herein. According to the ""697 application, a semiconductor chip package assembly has a spacer layer between the top surface of a sheet-like substrate and the contact bearing surface of a semiconductor chip. The substrate has conductive leads thereon and the leads have first ends which are electrically connected to terminals on the substrate and second ends which are bonded to respective chip contacts. Typically, the spacer layer includes a compliant or elastomeric material. A protective layer is attached on a bottom surface of the substrate so as to cover the terminals on the substrate and to seal any apertures in the substrate. After the attachment of the protective layer, a flowable, curable encapsulant material is deposited around at least a portion of a periphery of the semiconductor chip so as to encapsulate the leads. The protective layer prevents the encapsulant from flowing through any substrate apertures. The encapsulant material is then cured or at least partially cured to allow for handling or further processing.
Commonly assigned U.S. patent application Ser. No. 08/532,235 filed Sep. 22, 1995, the disclosure of which is incorporated herein by reference, provides methods of encapsulating a plurality of microelectronic assemblies. Each microelectronic assembly includes a dielectric layer overlying a microelectronic element, such as a semiconductor chip, and having a top surface facing away from the microelectronic element. Each assembly also includes terminals on a top surface of the dielectric layer and flexible leads connecting the terminals to contacts on the microelectronic element. The assemblies are disposed side-by-side with one another so that the microelectronic elements are side-by-side and so that the dielectric layers are also disposed side-by-side in substantially co-planar relationship with one another. The dielectric layers of the various assemblies may be separate from one another and may define openings therebetween. The dielectric layers of the various subassemblies may further have openings through the dielectric layer. The disclosed method further includes the step of filling a curable liquid encapsulant between the dielectric layers and the microelectronic elements while substantially preventing flow of the encapsulant onto the top surfaces of the dielectric layers through the openings defined between and/or within the dielectric layers. In preferred embodiments, a top covering layer, such as a substantially imperforate layer, is applied over the top surfaces of the respective dielectric layers and occludes the openings between and/or within the dielectric layers. Thus, the top covering layer serves to prevent flow of the encapsulant onto the top surfaces during the encapsulating step. After the filling step, the encapsulant is preferably cured to a gel or a solid and most preferably to a compliant gel or solid. The top covering layer may then be removed. Alternatively, the top covering layer may remain as an integral part of the assembly. Preferably the step of providing the top covering layer includes the step of providing a solid layer and a layer of a soft sealant so that the sealant is disposed between the solid layer and the dielectric layers of the various assemblies. The sealant substantially encapsulates the terminals. The sealant may be an adhesive and may secure the solid layer to the assemblies.
Accordingly, a method of controlling the encapsulation process so that the terminals on an exterior surface of a semiconductor chip package are not contaminated is desirable. In addition, it would be desirable to provide a method of forming an efficacious compliant layer between the microelectronic elements.
One aspect of the present invention provides a method of making a microelectronic assembly. A method in accordance with this aspect of the invention includes providing one or more microelectronic assemblies having one or more elements defining exterior surfaces and an array of terminals exposed at the exterior surfaces, the one or more elements defining one or more apertures through the exterior surfaces. Typically, each microelectronic assembly includes a first element and a second element defining the exterior surface. In such a structure, the terminals are mounted on the second element of each assembly and are connected to the first element by flexible leads. The first element may include a semiconductor chip and the second element may comprise a flexible dielectric sheet including a polymeric material. In certain embodiments the apertures are bond windows extending through each of the second elements. In other embodiments, the one or more assemblies include a plurality of assemblies disposed side-by-side so that the spaces between the second elements of the assemblies define at least some of the apertures. In still further embodiments, the one or more microelectronic assemblies may include a unitary sheet including a plurality of the second elements and a plurality of the first elements mounted to the sheet. The method also includes providing a layer of a curable barrier material on a supporting element, the layer having openings therein in a pattern corresponding to the array of terminals on the one or more microelectronic assemblies. The curable barrier material may be provided by screen printing the barrier material on a surface of the supporting element, whereby the supporting element maintains the barrier material in a substantially planar configuration during an assembling step, as will be discussed in more detail below. The curable barrier material is preferably provided in an uncured (xe2x80x9cwetxe2x80x9d) or partially cured (xe2x80x9cB-stage curedxe2x80x9d) state and may include a dielectric material such as an elastomer or gel.
In the next stage of the process, the supporting element and the one or more microelectronic elements are assembled together so that the layer of barrier material contacts the exterior surfaces and covers the apertures and so that the openings in the layer of barrier material are aligned with the terminals. The barrier material is then cured while in contact with the exterior surface of the second microelectronic element to provide a barrier layer or coverlay which is adhered to the exterior surface of the second microelectronic element and which covers the apertures. After curing the barrier material step, the barrier material, hereinafter referred to as the xe2x80x9cbarrier layer,xe2x80x9d and the supporting element cooperatively surround the terminals so as to isolate the terminals from contaminants.
In the next stage of the process, a curable liquid encapsulant, such as a curable silicone elastomer, a flexibilized epoxy or a gel, is applied to or allowed to flow around each assembly. The barrier layer covers the apertures to prevent the curable liquid encapsulant from flowing through the apertures and contacting the exterior surface of the second microelectronic element and the terminals thereon. The curable encapsulant may comprise a curable silicone elastomer, a flexibilized epoxy and/or a gel. The encapsulant is then cured. Because the barrier layer is cured before the encapsulant is allowed to flow between the first and second elements, the encapsulant will not chemically interact with the barrier layer. It has been determined that the use of an uncured or partially cured barrier layer during the encapsulating step will generally impede proper curing of the encapsulant. This is because the materials present in the barrier layer tend to inhibit or xe2x80x9cpoisonxe2x80x9d the catalyst used to make the liquid encapsulant fully cross-link or cure.
Where each assembly includes first and second elements, the supporting element is maintained substantially parallel to the first microelectronic element after the assembly step and the barrier material is cured while the supporting element is maintained in a substantially parallel configuration. The supporting element maintains the second element or dielectric sheet in a generally planar configuration while it is in contact with the supporting element. The encapsulant is allowed to flow between the first and second elements to provide a compliant layer therebetween for each assembly.
Preferably, the encapsulation method is performed on a plurality of microelectronic assemblies, such as a plurality of semiconductor chip packages sharing a common frame. That is, the second elements are formed as portions of a common dielectric sheet. After encapsulating the semiconductor chip packages and after curing the encapsulant, the semiconductor chip packages may be separated or severed (diced) from the common frame at a predetermined distance from the periphery of each semiconductor chip. The dicing step may be performed so that the package is no larger than the contact bearing surface of the chip, or may be performed so that encapsulant bumpers are provided around the periphery of the individual chip. A member, such as a heat sink or a protective ring, may also be attached to the rear face of the semiconductor chip and/or to the bumpers to, inter alia, dissipate heat from the semiconductor chip package and enhance the package""s structural integrity.
The method may also include the step of storing the one or more microelectronic assemblies after the curing the curable liquid encapsulant step, during which time the cured barrier layer and the supporting element cooperatively surround the terminals for protecting the terminals from contaminants. In this configuration, the supporting element remains attached to the barrier layer and overlies the terminals on the exterior surface for isolating and protecting the terminals from contaminants. When it is desirable to connect the one or more microelectronic assemblies to external circuit elements, the supporting element may be removed from the barrier layer so that the terminals on the exterior surface of the second microelectronic element are accessible through the openings in the barrier layer. The one or more microelectronic assemblies may then be electrically interconnected with external circuit elements by electrically connecting the terminals to conductive elements such as contact pads on the external elements. The terminals may be connected to the conductive elements using a conductive bonding material such as solder. Preferably, the supporting element is not removed from the barrier layer until less than 24 hours before the one or more assemblies are connected to an external circuit element and most preferably the supporting element is not removed until less than one hour before the assembly step.
The supporting element may comprise a fugitive material which is soluble in a liquid solvent such as water. As used herein, the term xe2x80x9cfugitive materialxe2x80x9d means any material which can be removed by application of heat, radiation, ultraviolet light or chemical treatment without destruction of the microelectronic elements, the electrically conductive parts, or the compliant layer. Typically, the fugitive material includes a water soluble material, and may include a water soluble adhesive. In such instances, the dissolving step includes the step of chemically treating the fugitive material with a solvent such as water. The fugitive material may also be a relatively low-melting thermoplastic material or another material which will evaporate at a relatively low temperature. In other embodiments, the supporting element may be a flexible substrate which is peeled off of the barrier layer. A release treatment may be provided between the supporting element and the barrier layer so that the supporting element may be readily removed from the barrier layer without pulling the barrier layer from the exterior surface of the second microelectronic element.
In one preferred embodiment, the method of providing one or more microelectronic assemblies includes the steps of providing a first microelectronic element having a front face with electrical contacts and a second microelectronic element having a first surface and an exterior surface including terminals and flexible conductive leads connected thereto. The second microelectronic element includes bond windows for accessing the leads and the contacts. A resilient element may be provided between the microelectronic elements so that the resilient element is in contact with the front face of the first microelectronic element and the first surface of the second microelectronic element. The resilient element spaces the first and second microelectronic elements apart from one another and also provides a compliant layer therebetween. The resilient element may include a porous resilient layer such as a plurality of compliant pads defining channels therebetween. When the curable liquid encapsulant is applied to the one or more microelectronic assemblies, as described above, the curable liquid encapsulant flows in the channels so that after the curable liquid encapsulant is cured, the compliant pads and the curable liquid encapsulant provide a homogenous compliant layer between the first and second elements. Preferably the coefficients of thermal expansion for the pads and the curable liquid encapsulant are substantially similar in order to minimize the effects of thermal mismatch and thermal cycling. In other embodiments, the resilient element may be a continuous or unitary resilient layer disposed between the microelectronic elements. The resilient element typically includes a curable elastomer such as a curable silicone elastomer.
The present invention incorporates the realization that the manner in which a microelectronic assembly is assembled, encapsulated and stored may adversely affect the condition of the assembly when it is later electrically connected to an external circuit element. Thus, where a microelectronic assembly having external conductive terminals is assembled and then placed in storage for a prolonged period of time, and then assembled to an external circuit element having electrical contacts, difficulties can arise in bonding the terminals to electrical contacts on the external circuit element. It is generally accepted that these difficulties result from contamination of the conductive terminals during assembly and/or storage. These difficulties may occur if the liquid encapsulant, such as a liquid silicone elastomer, comes in contact with the terminals during assembly. For example where a curable liquid encapsulant incorporating silicone compounds is allowed to come in contact with conductive terminals, the presence of silicone on the terminals may impede or retard the formation of a strong bond between the terminals and contacts on the external element. To avoid these problems, the present invention provides a layer of a barrier material or xe2x80x9cwetxe2x80x9d barrier layer on the exterior surfaces of the second elements which covers the apertures and intimately surrounds portions of the flexible leads which overlie the exterior surfaces. Although the present invention is not limited by any theory of operation, it is believed that the xe2x80x9cwetxe2x80x9d barrier layer is better able to conform to the contour of the exterior surfaces because it is relatively pliable prior to being cured. As a result, gaps will not form around the sides of the leads between the barrier layer and the exterior surfaces as may occur when a pre-formed or fully cured barrier layer is applied to the exterior surfaces, as will be discussed in further detail below. After the xe2x80x9cwetxe2x80x9d barrier layer has been cured, the layer prevents the curable liquid encapsulant from flowing through the apertures and coming in contact with the terminals during the step of applying a curable liquid encapsulant. In addition, the protective layer and the supporting element cooperatively surround and protect the terminals to isolate the terminals from external contaminants.
The present invention also incorporates the realization that the formation of a compliant layer or compliant encapsulant may be impeded if the curable liquid encapsulant is improperly cured. This may occur when the encapsulant is cured while in contact with an uncured or partially cured barrier layer because the xe2x80x9cwetxe2x80x9d barrier layer will inhibit or xe2x80x9cpoisonxe2x80x9d the catalyst used to make the liquid encapsulant fully cross-link/cure. Accordingly, in preferred embodiments of the present invention, the liquid encapsulant is introduced only after the barrier material has been both attached to the exterior surfaces of the second elements and fully cured. Thus, since the barrier layer is fully cured prior to the introduction of the encapsulant, the barrier layer will not chemically interact with the encapsulant.
In other embodiments, a xe2x80x9cwetxe2x80x9d barrier layer is not utilized, but a pre-formed or fully cured barrier layer is used in conjunction with a supporting element to cover the apertures and/or bond windows and surround the perimeter of the terminals. Although, the use of a fully cured barrier layer does not take advantage of the pliable features described above for intimately surrounding the leads overlying the exterior surfaces, the fully cured barrier layer used in these embodiments still provides an effective method for isolating the terminals from contaminants and forming an efficacious compliant interface. A method of making a microelectronic assembly according to these embodiments includes providing one or more microelectronic assemblies having one or more elements defining exterior surfaces and an array of terminals exposed at the exterior surfaces, the one or more elements defining one or more apertures through the exterior surfaces. Next, a barrier layer is provided on the supporting element, the layer having first openings therein a pattern corresponding to the array of terminals on the one or more microelectronic assemblies. The barrier layer may include a flexible coverlay which confirms to the exterior surfaces. The supporting element may be substantially rigid or substantially flexible. Next, the supporting element and the one or more microelectronic assemblies are assembled together so that the barrier layer contacts the exterior surfaces and covers the apertures and so that the openings in the barrier layer are aligned with the terminals. After the assembling step, the terminals are aligned in the openings in the barrier layer and the supporting element overlies the terminals. A curable liquid encapsulant is then applied to the microelectronic assemblies to encapsulate the assemblies and the flexible leads. Here again, the barrier layer prevents the curable liquid encapsulant from flowing through the apertures. The curable liquid encapsulant is then cured. The barrier layer may also preferably have second openings which are aligned with the bond windows so that the coverlay material cannot inhibit cure of the encapsulant. The barrier layer and the supporting element cooperatively surround the terminals on the exterior surfaces in order to isolate the terminals from external contaminants, such as silicone or dust. The curable liquid encapsulant is then cured to provide a compliant layer between the one or more microelectronic assemblies and around the flexible leads. After the curing step, the assemblies may be placed in storage with the barrier layer and the supporting element in place. While the assembly is in storage, the barrier layer and the supporting element continue to isolate the terminals from contaminants. The assembly can later be removed from storage and connected to an external circuit element as described above in other embodiments. The supporting element also protects the terminals from contaminants when the assembly is being diced to provide individual microelectronic packages.
In other preferred embodiments, a microelectronic assembly includes one or more microelectronic assemblies having one or more elements defining exterior surfaces and an array of terminals exposed at the exterior surfaces, the one or more elements defining one or more apertures through the exterior surfaces. For example, each assembly may include a first microelectronic element having electrical contacts, a second microelectronic element having the terminals and flexible leads electrically interconnecting the terminals and the electrical contacts, whereby the second microelectronic element includes the apertures, and a compliant layer assembled between the first and second microelectronic elements and surrounding the flexible leads. The terminals are accessible at the exterior surface of the second microelectronic element and may be located on the exterior surface or accessible through openings in the exterior surface. The assembly further includes a barrier layer contacting the exterior surface of the second microelectronic element and covering the apertures. The barrier layer has openings therein which are in a pattern corresponding to the array of terminals exposed at the exterior surface. The openings are aligned with the terminals so that the terminals may be accessed through the openings. A supporting element overlies the terminals and the openings in the barrier layer. The barrier layer and the supporting element, which is removably secured to the barrier layer, cooperatively surround the terminals to isolate the terminals from contaminants. For example, in some embodiments the supporting element is a substantially flexible storage liner including a release liner which facilitates removal of the storage liner from the barrier layer. In other embodiments, the supporting element includes a fugitive material, such as a material dissolvable in water. An adhesive may be disposed between the barrier layer and the exterior surface. In certain preferred embodiments of the assembly, the first microelectronic element includes a semiconductor chip and the second microelectronic element includes a flexible dielectric sheet having a polymeric material. The assembly according to this embodiment may be stored and later assembled to an external circuit board according to the processes described above.
The foregoing and other objects and advantages of the present invention will be better understood from the following detailed description of preferred embodiments taken together with the attached drawings.